1. Field of the Invention
The present invention relates to an active-matrix addressing substrate and a method of fabricating the substrate and more particularly, to an active-matrix addressing substrate preferably used for an active-matrix addressing Liquid-Crystal Display (LCD) device using lateral electric field, and a method of fabricating the substrate.
2. Description of the Related Art
The TN (Twisted Nematic) type LCD device using vertical electric field, which has been extensively used in various fields, has an advantage of high contrast; however, it has a disadvantage that the viewing angle dependence is conspicuous because the axis of the liquid-crystal molecules is rotated to the direction perpendicular to the liquid crystal layer (i.e., an active-matrix addressing substrate and an opposite substrate) by applied vertical electric field.
Recently, there has been an increasing demand for the LCD device applicable to large-sized monitors such as television (TV). In response to this demand, the LCD device using lateral electric field, which is termed the “In-Plane Switching (IPS)” type, has been used more often than ever. The IPS type LCD device has an advantage that the viewing angle characteristics are much favorable compared with the conventional TN type LCD device. This is because, with the IPS type LCD device, the axis of the liquid-crystal molecules is rotated by lateral electric field in planes parallel to the active-matrix addressing substrate and the opposite substrate and therefore, the viewing angle dependence with respect to the rotation angle of the liquid-crystal molecule is eliminated.
Thus, the IPS type LCD device has better viewing angle characteristics than the TN type one. However, with the IPS type LCD device, the pixel electrode and the common electrode are comb-teeth shaped and arranged opposingly, and lateral electric field is applied across the pixel and common electrodes. For this reason, the pixel and common electrodes occupy a wider area in the display region than the TN type LCD device, which causes a problem that the aperture ratio is lowered.
As an solution to this problem, an active-matrix addressing substrate is disclosed in the Japanese Non-Examined Patent Publication No. 2002-323706 (page 20, column 38, line 32 to page 28, column 53, line 50, FIGS. 1 and 2), which may be termed the “first prior-art substrate” below. This prior-art substrate is shown in FIG. 1 and FIGS. 2A to 2C attached. FIG. 1 is a plan view of the first prior-art substrate. FIGS. 2A to 2C are partial cross-sectional views along the lines IIA-IIA, IIB-IIB, and IIC-IIC in FIG. 1, respectively. These figures show the structure of one of the pixel regions.
In this specification, the structure of one of the pixel regions arranged in a matrix array will be mainly explained for the sake of simplification of description, because each of the pixel regions has the same structure.
As shown in FIG. 1 and FIGS. 2A to 2C, the first prior-art substrate comprises scanning signal lines 301 and common signal lines 302, which are extended in parallel to each other on a surface of a transparent glass plate 320. These lines 301 and 302 are formed by patterning a first metal film. Part of each scanning signal line 301 serves as a gate electrode of a corresponding one of Thin-Film Transistors (TFTs) 305. A first insulating layer 303 is formed on the whole plate 320 to cover the lines 301 and 302.
On the first insulating layer 303, for each of the TFTs 305, a patterned amorphous silicon (a-Si) layer 321 and an n-type patterned a-Si layer 322 are formed in this order to be overlapped with a corresponding one of the scanning signal lines 301 in the TFT section. A source electrode 306. and a drain electrode 304a of the TFT 305 are formed to overlap with the corresponding one of the a-Si layers 322. Moreover, image signal lines 304 and auxiliary pixel electrodes 306a are formed on the first insulating layer 303 to extend perpendicular to the scanning signal lines 301 and the common signal lines 302. The image signal lines 304, the drain electrodes 304a, the source electrodes 306, and the auxiliary pixel electrodes 306a are formed by patterning a second metal film. The drain electrodes 304a are united with the corresponding image signal lines 304, respectively. The auxiliary pixel electrodes 306a are united with the corresponding source electrodes 306, respectively. A second insulating layer 307 is formed on the first insulating layer 303 to cover the image signal lines 304, the drain electrodes 304a, the source electrodes 306, and the auxiliary pixel electrodes 306a over the whole plate 320.
A third insulating layer 308, which is thick and transparent, is formed on the second insulating layer 307 over the whole plate 320. On the third insulating layer 308, pixel electrodes 309 and a common electrode 310 are formed by patterning a transparent, conductive material film. Each of the pixel electrodes 309 has comb-teeth-shaped parts. The common electrode 310 has comb-teeth-shaped parts. The comb-teeth-shaped parts of the electrodes 309 and 310 are engaged with each other, as shown in FIG. 1. The image signal lines 304 are entirely covered with the common electrode 310 by way of the second and third insulating layers 307 and 308.
The pixel electrodes 309 are contacted with the corresponding source electrodes 306 by way of corresponding contact holes 311, respectively. The common electrode 310 is contacted with the common signal lines 302 by way of corresponding contact holes 312, respectively. Therefore, the pixel electrodes 309 are electrically connected to the corresponding source electrodes 306, respectively. The common electrode 310 is electrically connected to the common signal lines 302.
With the first prior-art substrate, as described above, since the comb-teeth-shaped parts of the pixel electrodes 309 and those of the common electrode 310 are transparent, light penetrates the areas occupied by these comb-teeth-shaped parts in the pixel regions. Thus, the transmittance is raised. According to the result of the inventor's simulation, the effective aperture ratio will be raised by approximately 8%, where the contribution by these areas is considered.
Moreover, the image signal lines 304 are entirely overlapped or covered with the common electrode 310 and thus, the aperture of the pixel region can be expanded to the vicinity of the corresponding image signal lines 304. At the same time, leaked electric field from the lines 304 is shielded by the common electrode 310 and therefore, a disadvantage of longitudinal crosstalk is reduced.
In addition, because the third insulating layer 308 is located between the image signal lines 304 and the common electrode 310, a load capacitance is generated. However, by making the layer 308 with a dielectric material having a low dielectric constant, the value of the load capacitance can be suppressed within the permissible range for driving.
As another solution to the above-described problem, an active-matrix addressing substrate is disclosed in the Japanese Non-Examined Patent Publication No. 2004-302448 (page 15, line 8 to line 36, FIGS. 10 and 11), which may be termed the “second-art substrate” below. This prior-art substrate is shown in FIG. 3 and FIGS. 4A to 4C attached. FIG. 3 is a plan view of the second prior-art substrate. FIGS. 4A to 4C are partial cross-sectional views along the lines IVA-IVA, IVB-IVB, and IVC-IVC in FIG. 3, respectively. These figures show the structure of one of the pixel regions.
As shown in FIG. 3 and FIGS. 4A to 4C, the second prior-art substrate comprises scanning signal lines 401 and common signal lines 402, which are extended in parallel to each other on a surface of a transparent glass plate 420. These lines 401 and 402 are formed by patterning a first metal film. Part of each scanning signal line 401 serves as a gate electrode of a corresponding one of TFTs 405. A first insulating layer 403 is formed on the whole plate 420 to cover the lines 401 and 402.
On the first insulating layer 403, for each of the TFTs 405, a patterned a-Si layer 421 and an n-type patterned a-Si layer 422 are formed in this order to be overlapped with a corresponding one of the scanning signal lines 401 in the TFT section. A source electrode 406 and a drain electrode 404a of the TFT 405 are formed to overlap with the corresponding one of the a-Si layers 422. Moreover, image signal lines 404 and auxiliary pixel electrodes 406a are formed on the first insulating layer 403 to extend perpendicular to the scanning signal lines 401 and the common signal lines 402. The image signal lines 404, the drain electrodes 404a, the source electrodes 406, and the auxiliary pixel electrodes 406a are formed by patterning a second metal film. The drain electrodes 404a are united with the corresponding image signal lines 404, respectively. The auxiliary pixel electrodes 406a are united with the corresponding source electrodes 406, respectively. A second insulating layer 407 is formed on the first insulating layer 403 to cover the image signal lines 404, the drain electrodes 404a, the source electrodes 406, and the auxiliary pixel electrodes 406a over the whole plate 420.
A third insulating layer 408, which is thick, is selectively formed on the second insulating layer 407. The layer 408 is left to cover only the respective image signal lines 404. The cross section of the layer 408 is like banks that extend along the respective lines 404, as shown in FIG. 4B. Pixel electrodes 409 and a common electrode 410 are formed on the second or third insulating layer 407 or 408 by patterning a transparent, conductive material film. Each of the pixel electrodes 409 has comb-teeth-shaped parts. The common electrode 410 has comb-teeth-shaped parts. The comb-teeth-shaped parts of the electrodes 409 and 410 are engaged with each other, as shown in FIG. 3. The image signal lines 404 are entirely covered with the common electrode 410 by way of the second and third insulating layers 407 and 408.
The pixel electrodes 409 are contacted with the corresponding source electrodes 406 by way of corresponding contact holes 411, respectively. The common electrode 410 is contacted with the common signal lines 402 by way of corresponding contact holes 412, respectively. Therefore, the pixel electrodes 409 are electrically connected to the corresponding source electrodes 406, respectively. The common electrode 410 is electrically connected to the common signal lines 402.
As seen from the above explanation, the structure of the second prior-art substrate is the same as that of the above-described first prior-art substrate of FIG. 1 and FIGS. 2A to 2C, except that the third insulating layer 408 is selectively left in the form of banks on the second insulating layer 407, covering only the image signal lines 404. Thus, the effective aperture ratio of the second prior-art substrate is equivalent to that of the first prior-art substrate.
Moreover, with the second prior-art substrate, the third insulating layer 408 is not left in the aperture of the pixel region and therefore, a colored dielectric material may be used for the layer 408. Since colored dielectric materials such as organic material (e.g., novolac resin) are obtainable at a low cost, an equivalent performance can be realized at a lower cost than the first prior-art substrate. On the other hand, with the first prior-art substrate, the third insulating layer 408 must be transparent because the layer 408 is formed over the whole glass plate 420. The cost of transparent dielectric materials is higher than that of colored dielectric material, raising the cost of the substrate itself.
As still another solution to the above-described problem, an active-matrix addressing substrate is disclosed in the Japanese Non-Examined Patent Publication No. 2004-062145 (page 26, line 42 to page 27, line 15, FIG. 23), which may be termed the “third prior-art substrate” below. This prior-art substrate is shown in FIG. 5 and FIGS. 6A to 6C attached. FIG. 5 is a plan view of the third prior-art substrate. FIGS. 6A to 6C are partial cross-sectional views along the lines VIA-VIA, VIB-VIB, and VIC-VIC in FIG. 5, respectively. These figures show the structure of one of the pixel regions.
As shown in FIG. 5 and FIGS. 6A to 6C, the third prior-art substrate comprises scanning signal lines 501 and common signal lines 502, which are extended in parallel to each other on a surface of a transparent glass plate 520. These lines 501 and 502 are formed by patterning a first metal film. Part of each scanning signal line 501 serves as a gate electrode of a corresponding one of TFTs 505. A first insulating layer 503 is formed on the whole plate 520 to cover the lines 501 and 502.
On the first insulating layer 503, for each of the TFTs 505, a patterned a-Si layer 521 and an n-type patterned a-Si layer 522 are formed in this order to be overlapped with a corresponding one of the scanning signal lines 501 in the TFT section. A source electrode 506a and a drain electrode 504a of the TFT 505 are formed to overlap with the corresponding one of the a-Si layers 522. Moreover, image signal lines 504 are formed on the first insulating layer 503 to extend perpendicular to the scanning signal lines 501 and the common signal lines 502. The image signal lines 504, the drain electrodes 504a, the pixel electrodes 506, and the source electrodes 506a are formed by patterning a second metal film. The drain electrodes 504a are united with the corresponding image signal lines 504, respectively. The source electrodes 506a are united with the corresponding pixel electrodes 506, respectively. A second insulating layer 507 is formed on the first insulating layer 503 to cover the image signal lines 504, the drain electrodes 504a, the pixel electrodes 506, and the source electrodes 506a over the whole plate 520. Since the pixel electrodes 506 are united with the corresponding source electrodes 506a, contact holes for electrically connecting the pixel electrodes 506 to the corresponding source electrodes 506a are unnecessary.
A third insulating layer 508, which is thick, is selectively formed on the second insulating layer 507. The layer 508 is left to cover only the respective image signal lines 504. The cross section of the layer 508 is like banks that extend along the respective lines 504, as shown in FIG. 6B. A common electrode 510 is formed on the second or third insulating layer 507 or 508 by patterning a transparent, conductive material film. Like the first and second prior-art substrates, each of the pixel electrodes 506 has comb-teeth-shaped parts, and the common electrode 510 has comb-teeth-shaped parts also. The image signal lines 504 are entirely covered with the common electrode 510 by way of the second and third insulating layers 507 and 508.
Similar to the second prior-art substrate, the third insulating layer 508 may be formed by a colored or transparent dielectric material.
The common electrode 510 is contacted with the common signal lines 502 by way of corresponding contact holes 512, respectively. Therefore, the common electrode 510 is electrically connected to the common signal lines 502.
With the third prior-art substrate of FIG. 5 and FIGS. 6A to 6C, similar to the second prior-art substrate, the third insulating layer 508 is selectively left to cover only the respective image signal lines 504 and has a cross section like banks. This is to lower the driving voltage by way of reduction of the load capacitance. Specifically, since the pixel electrodes 506 and the common electrode 510 are formed on the first and second insulating layers 503 and 507, respectively, these comb-teeth-shaped parts of the electrodes 506 and 510 are located on different levels. Thus, if the third insulating layer 508 is formed over the glass plate 520, the driving voltage will be too high. Accordingly, the third insulating layer 508 is selectively left to cover only the image signal lines 504.
Furthermore, like the second prior-art substrate, the image signal lines 504 are entirely overlapped or covered with the common electrode 510 and thus, the aperture of the pixel region can be expanded to the vicinity of the corresponding image signal lines 504. At the same time, because the image signal lines 504 are approximately surrounded by in cross section by the common electrode 510 like the second prior-art substrate, the obtainable function of shielding the leaked electric field from the image signal lines 504 is enhanced compared with the first prior-art substrate. According to the inventor's experiment, to effectively shield the leaked electric field from the image signal lines 504, it is sufficient that the common electrode 510 has a lateral projection width of 4 μm from an edge of the corresponding image signal line 504.
With the third prior-art substrate, as described above, the count of contact holes is decreased by one, and the lateral projection width of the common electrode 510 from an edge of the corresponding image signal line 504 is reduced. Therefore, a higher aperture ratio is obtainable than the second prior-art substrate.
Moreover, since the pixel electrodes 506 are formed by conductive metal, contribution to the transmittance is lowered. However, according to the result of the inventor's simulation, the effective aperture ratio will be raised by approximately 5%. As a result, the effective aperture ratio will be higher than the first and second prior-art substrates in total. A disadvantage of longitudinal crosstalk can be suppressed also.
As explained above, as seen from the second and third prior-art substrates, by selectively leaving the bank-shaped third insulating layer 407 or 507 intervening between the image signal lines 404 or 504 and the common electrode 410 or 510 to cover only the image signal lines 404 or 504, lower fabrication cost and higher aperture ratio than those of the first prior-art substrate can be realized.
However, if the banks-shaped third insulating layer 407 or 507 is selectively left to cover only the image signal lines 404 or 504 to raise the performance of increasing the aperture ratio, large steps (i.e., large differences in level) are likely to be formed in the vicinities of the image signal lines 404 or 504. These large steps will generate non-uniformity of the rubbing directions, which disturbs the initial alignment of liquid-crystal molecules. This is observable as optical leakage in the vicinities of the steps when black is displayed. Since the IPS type LCD device is driven in the normally black mode, the said disturbance of the initial alignment will be a cause of optical leakage near the steps of the third insulating layer 407 or 507, raising the black luminance and lowering the contrast.
As a solution of this problem, an active-matrix addressing substrate was created and filed on Jan. 8, 2004 as the Japanese Patent Application No. 2004-002782 (which corresponds to the Japanese Non-Examined Patent Publication No. 2005-195927)(FIGS. 1 and 2 and their corresponding explanation), which may be termed the “first related-art substrate” below. This related-art substrate is shown in FIG. 7 and FIGS. 8A to 8C attached. FIG. 7 is a plan view of the first related-art substrate. FIGS. 8A to 8C are partial cross-sectional views along the lines VIIIA-VIIIA, VIIIB-VIIIB, and VIIIC-VIIIC in FIG. 7, respectively. These figures show the structure of one of the pixel regions.
The structure of the first related-art substrate is the same as that of the third prior-art substrate of FIG. 5 and FIGS. 6A to 6C except that light-shielding electrodes 613 are additionally provided in the vicinities of respective image signal lines 604 on the same level as signal lines 601 and common signal lines 602.
Specifically, as shown in FIG. 7 and FIGS. 8A to 8C, the first related-art substrate comprises scanning signal lines 601 and common signal lines 602, which are extended in parallel to each other on a surface of a transparent glass plate 620. These lines 601 and 602 are formed by patterning a first metal film. Part of each scanning signal line 601 serves as a gate electrode of a corresponding one of TFTs 605.
On the glass plate 620, a pair of linear light-shielding electrodes 613 is additionally provided in the vicinity of each of the image signal lines 604. The electrodes 613, which are formed to extend along the said line 604, may be electrically connected to the corresponding common signal lines 602 or electrically isolated from other electrodes. Since the light-shielding electrodes 613 are located on the plate 620, the electrodes 613 are on the same level as the signal lines 601 and the common signal lines 602. The light-shielding electrodes 613 are formed by patterning the first metal film for the signal lines 601 and the common signal lines 602.
A first insulating layer 603 is formed on the whole plate 620 to cover the scanning signal lines 601, the common signal lines 602, and the light-shielding electrodes 613.
On the first insulating layer 603, for each of the TFTs 605, a patterned a-Si layer 621 and an n-type patterned a-Si layer 622 are formed in this order to be overlapped with a corresponding one of the scanning signal lines 601 in the TFT section. A source electrode 606a and a drain electrode 604a of the TFT 605 are formed to overlap with the corresponding one of the a-Si layers 622.
Image signal lines 604 are formed to be buried in the first insulating layer 603 to extend perpendicular to the scanning signal lines 601 and the common signal lines 602. The image signal lines 604, the drain electrodes 604a, the pixel electrodes 606, and the source electrodes 606a are formed by patterning a second metal film. The drain electrodes 604a are united with the corresponding image signal lines 604, respectively. The source electrodes 606a are united with the corresponding pixel electrodes 606, respectively.
A second insulating layer 607 is formed on the first insulating layer 603 to cover the image signal lines 604, the drain electrodes 604a, the pixel electrodes 606, and the source electrodes 606a over the whole plate 620. Since the pixel electrodes 606 are united with the corresponding source electrodes 606a, contact holes for electrically connecting the pixel electrodes 606 to the corresponding source electrodes 606a are unnecessary.
A third insulating layer 608, which is thick, is selectively formed on the second insulating layer 607. The third insulating layer 608 is left to cover only the respective image signal lines 604. The cross section of the layer 608 is like banks that extend along the respective lines 604, as shown in FIG. 8B. A common electrode 610 is formed on the second or third insulating layer 607 or 608 by patterning a transparent, conductive material film. Like the first and second prior-art substrates, each of the pixel electrodes 609 has comb-teeth-shaped parts, and the common electrode 610 has comb-teeth-shaped parts also. The image signal lines 604 are entirely covered with the common electrode 610 by way of the second and third insulating layers 607 and 608.
The common electrode 610 is contacted with the common signal lines 602 by way of corresponding contact holes 612, respectively. Therefore, the common electrode 610 is electrically connected to the common signal lines 602.
With the first related-art substrate of FIG. 7 and FIGS. 8A to 8C, the light-shielding electrodes 613 are additionally provided in the vicinity of each of the image signal lines 604 on the same level as signal lines 601 and common signal lines 602. Therefore, optical leakage due to the steps (i.e., level difference) near the image signal lines 604 can be prevented and thus, the raising of the black luminance and the lowering of the contrast can be suppressed.
The light-shielding electrodes 613 may be electrically connected to the corresponding common signal lines 602 or electrically isolated (i.e., electrically floating) from other electrodes. Moreover, the electrodes 613 may be located at one side or both sides of each image signal line 604, where these two arrangements are selected according to the layout of the pixels.
In this way, optical leakage due to the steps (i.e., level difference) of the third insulating layer 608 near the image signal lines 604 can be prevented by the light-shielding electrodes 613 and thus, the raising of the black luminance and the lowering of the contrast can be suppressed. However, the inventor found that the effect by the thickness of the pixel electrodes 610 is unable to be ignored when the pixel electrodes 610 are formed by metal.
FIG. 10 schematically shows the cross section of the aperture of the pixel region in the first related-art substrate of FIG. 7 and FIGS. 8A to 8C. As shown in FIG. 10, when a silicon nitride (which is a popular material) is deposited on a first insulating layer 203 by a CVD (Chemical Vapor Deposition) process as a second insulating layer 207 after a pixel electrode 206 is formed on the first insulating layer 203, the layer 207 will be formed to have a step (i.e., level difference) 230 corresponding to the step caused by the pixel electrode 206. Since the step 230 of the layer 207 is steep, it generates non-uniformity of the rubbing directions, causing optical leakage in the state of displaying black near the step 230. As a result, the problem that the black luminance is raised and the contrast is lowered is left unsolved.
In FIG. 10, the reference numerals 210 and 220 denote a common electrode and a transparent glass plate, respectively.
On the other hand, if the thickness of the pixel electrode 206 is decreased to reduce the inter-level distance of the step 230, the thickness of the image signal line (not shown in FIG. 10) will be reduced. This is because the pixel electrode 206 and the image signal line are formed by patterning the same metal film. Therefore, there arises another problem that the image signal to be written into the corresponding pixel by way of the image signal line will be delayed.
Moreover, similar to the third prior-art substrate and the first related-art substrate, with the structure that the common electrode 210 is located above the pixel electrode 206 by way of the intervening second insulating layer 207, the thickness of the alignment layer (which is located over the common electrode 210) is likely to be non-uniform due to the steps of the common electrode 210. As a result, the initial alignment of liquid-crystal molecules by rubbing operation will degrade, thereby causing a similar problem to the above-identified problem caused by the step 230 of the pixel electrode 206.